亚洲 另类 小说 国产精品_强行扒开美女内裤猛烈进入_男人揉女人下面免费网站_67194精品在线观看_日本少妇强奸中文字幕高清_久久久精品免费视频图片_欧美偷拍另类一区_波多野结衣无码高清_āv男人的天堂在线免费观看_av黄片在线播放麻豆

歡迎光臨湖北鑫合欣官方網(wǎng)站 收藏本站| 公司文化| 聯(lián)系我們
全國熱線
18062095810

?產(chǎn)品展示?

推薦產(chǎn)品

咨詢熱線:

18062095810

郵件: wangting@whhexin.com

電話:027-87538900

地址: 湖北·武漢·魯巷·華樂商務(wù)中心1006

【DK-DEV-5ASTD5N】Arria V SoC Development Kit

  • 產(chǎn)品型號: DK-DEV-5ASTD5N/A5SOC(Part No:T0454)
  • 產(chǎn)品品牌: TERASIC友晶科技/Intel FPGA
  • 產(chǎn)品規(guī)格: Arria V ST SoC—5ASTFD5K3F40I3N (SoC)
  • 產(chǎn)品價格: 歡迎咨詢采購,量多優(yōu)惠多,提供完善的售后保障和支持!
  • 咨詢熱線:18062095810

The Altera® Arria® V SoC Development Kit offers a quick and simple approach to develop custom ARM® processor-based SoC designs. Altera’s midrange, transceiver-based Arria V FPGA fabric provides the highest bandwidth with the lowest total power for midrange applications such as:

  • Remote radio units*

  • 10G/40G line cards*

  • Medical imaging

  • Broadcast studio equipment.

  • Acceleration of image- and video-processing applications*

  • PCI Express® (PCIe®) Gen2 x4 lanes (endpoint or rootport)

Featured devices

  • Arria V ST SoC—5ASTFD5K3F40I3NES (SoC)

  • MAX® V CPLD—5M2210ZF256C4N (system controller)

  • MAX II CPLD—EPM570GF100 (embedded USB-BlasterTM II cable)

FPGA configuration sources

  • Embedded USB-Blaster II (JTAG) cable

  • EPCQ flash (Active Serial x1 or x4 configuration)

  • Flash fast passive parallel (FPP)

  • Hard processor system (HPS)

FPGA memory

  • 2x 1,024 MB 32-bit DDR3 SDRAM

  • 1x 512 Megabit (Mb) CFI synchronous Flash

  • 1x 256 Mb NOR Flash (EPCQ)

FPGA I/O interfaces

  • 1x PCI Express x4 Gen2 socket

  • 2x FPGA mezzanine card (FMC) portds

  • 2x 10/100 Ethernet ports

  • 2x SPF+ ports

  • 4x user LEDs

  • 4x user pushbuttons

  • 4x user dip switches

  • HPS boot sources

  • 512 Mb QSPI Flash

  • Removable micro-SDCard flash

  • FPGA

HPS memory

  • 1x 1,024 Mbyte (MB) DDR3 SDRAM with ECC

  • 1x 512 Mb QSPI flash

  • Micro-SDCard socket with 4 GB micro-SDCard flash device

  • One 32 Kb I2C serial EEROM

HPS I/O interfaces

  • 1x 1 Gigabit Etherent port (HPS)

  • 1x USB 2.0 on-the-go (OTG) port (HPS)

  • 2x RS-232 UART (through mini-USB port)

  • x1 real-time clock (with battery backup)

  • x1 two-line text LCD

  • x4 user LEDs

  • x4 user push buttons

  • x4 DIP switches

Clocking

  • Four-output programmable clock generator for FPGA reference clock inputs

  • 148.5 MHz LVDS programmable voltage-controlled crystal oscillator (VCXO) for FPGA reference clock input

  • 50 MHz single-ended oscillator for FPGA and MAX V FPGA clock input

  • 100 MHz single-ended oscillator for MAX V FPGA configuration clock input

  • SMA inputs for FPGA and HPS clocks

  • LMK04828 clock jitter cleaner

Power

  • Laptop DC input 14—20 V adapter

System monitoring circuit

  • Power (voltage, current, wattage)

Mechanical

  • Board dimensions—7.175” x 9” 

SoC Embedded Design Suite Subscription Edition

  • ARM Development Studio 5 (DS-5™) Altera Edition Toolkit

  • Hardware-to-software handoff tools

  • Linux run-time software for application development

  • SoC hardware libraries for firmware development

  • Application examples

No 產(chǎn)品名稱 售價(RMB)
1. [A5SOC] Altera Arria V SoC Development Kit and SoC Embedded Design Suite
產(chǎn)品編號: T0235  重量: 3,400g
xxx




 


Documents

標題 版本 檔案大小(KB) 新增日期 下載
Arria V SoC Development Kit User Guide 1.0 3136 2014-06-04
Arria V SoC Development Board Reference Manual 1.0 1978 2014-06-04

CD-ROM

標題 版本 檔案大小(KB) 新增日期 下載
Kit installation (EXE) (Windows) 13.1.0.5   2014-06-04
Kit installation (ZIP) (Linux) 13.1.0.5   2014-06-04